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355
asm-to-prg.py
355
asm-to-prg.py
@ -1,5 +1,5 @@
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filename = "try_to_fix_me.asm"
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filename = "test.asm"
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#
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@ -86,15 +86,24 @@ def convert_to_int(value):
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import os
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from termcolor import colored
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macro_definitions = {}
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def preprocess(lines, filename="main.asm", included_files=None):
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if included_files is None:
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included_files = set() # Tracks included files to prevent recursion
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def preprocess(lines, filename="main.asm"):
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errors = []
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warnings = []
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error_flag = False
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# Memory and stack tracking
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instruction_count = 0
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memory_limit = 256 # Total memory available
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memory_limit = 1024 # Total memory available
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stack_balance = 0
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program_length = 0 # To calculate and validate memory access
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@ -102,12 +111,65 @@ def preprocess(lines, filename="main.asm"):
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valid_registers = {"a", "b", "c", "d", "e", "f"}
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valid_instructions = {"ldw", "mov", "add", "sub", "str", "ldr", "int",
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"push", "pop", "jsr", "ret", "xor", "and", "jmp",
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"mul", "div", "bne", "beq", "blt"}
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"mul", "div", "bne", "beq", "blt", "ldb", "stb"}
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label_references = []
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labels = {}
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# First pass: Parse instructions and calculate program length
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# Expand include directives
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expanded_lines = []
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for line_number, line in enumerate(lines, start=1):
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code = line.strip()
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if code.startswith("%include"):
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# Handle include directives
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parts = code.split(maxsplit=1)
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if len(parts) != 2:
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errors.append((line_number, "Invalid %include syntax", line))
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error_flag = True
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continue
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include_file = parts[1].strip("\"")
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if include_file in included_files:
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errors.append((line_number, f"Recursive inclusion detected for file '{include_file}'", line))
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error_flag = True
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continue
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if not os.path.exists(include_file):
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errors.append((line_number, f"Included file '{include_file}' not found", line))
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error_flag = True
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continue
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try:
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included_files.add(include_file)
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with open(include_file, 'r') as f:
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included_lines = f.readlines()
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expanded_lines.extend(preprocess(included_lines, filename=include_file, included_files=included_files))
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except Exception as e:
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errors.append((line_number, f"Failed to include file '{include_file}': {str(e)}", line))
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error_flag = True
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elif code.startswith("%define"):
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# Handle macros
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parts = code.split(maxsplit=2)
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if len(parts) != 3:
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errors.append((line_number, "Invalid %define syntax", line))
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error_flag = True
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continue
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macro_name, macro_value = parts[1], parts[2]
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if macro_name in macro_definitions:
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errors.append((line_number, f"Macro '{macro_name}' redefined", line))
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error_flag = True
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continue
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macro_definitions[macro_name] = macro_value
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continue # Skip adding %define line to the output
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else:
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expanded_lines.append(line)
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# First pass: Parse instructions and calculate program length
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for line_number, line in enumerate(expanded_lines, start=1):
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code = line.split(";")[0].strip() # Strip comments and whitespace
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if not code:
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continue
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@ -116,94 +178,114 @@ def preprocess(lines, filename="main.asm"):
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if code.endswith(":"):
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label_name = code[:-1]
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if label_name in labels:
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warnings.append((line_number, f"duplicate label '{label_name}'", line))
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warnings.append((line_number, f"Duplicate label '{label_name}'", line))
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labels[label_name] = instruction_count
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continue
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# Parse instruction
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parts = re.split(r"\s+", code)
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parts = code.split()
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instruction = parts[0].lower()
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if instruction in valid_instructions:
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if instruction in {"ldw", "mov", "add", "sub", "str", "ldr", "xor", "and", "mul", "div"}:
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instruction_count += 3 # These are 3-byte instructions
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if instruction == "db":
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# Handle string definitions
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if len(parts) < 2:
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errors.append((line_number, f"Missing operand for '{instruction}'", line))
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error_flag = True
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continue
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string_literal = " ".join(parts[1:]).strip("\"")
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instruction_count += len(string_literal) + 1 # Include null terminator
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elif instruction in valid_instructions:
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if instruction in {"ldw", "mov", "add", "sub", "str", "ldr", "xor", "and", "mul", "div", "ldb", "stb"}:
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instruction_count += 3
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elif instruction in {"bne", "beq", "blt"}:
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instruction_count += 4 # Conditional branches are 4-byte instructions
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instruction_count += 4
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elif instruction in {"push", "pop", "int", "jmp", "jsr", "ret"}:
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instruction_count += 3 # Fixed size for other instructions
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instruction_count += 3
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else:
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errors.append((line_number, f"unknown instruction '{instruction}'", line))
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errors.append((line_number, f"Unknown instruction '{instruction}'", line))
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error_flag = True
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program_length = instruction_count # Final length of the program
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# Second pass: Validate instructions and operands
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for line_number, line in enumerate(lines, start=1):
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code = line.split(";")[0].strip() # Strip comments and whitespace
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for line_number, line in enumerate(expanded_lines, start=1):
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code = line.split(";")[0].strip()
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if not code:
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continue
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# Skip labels
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# Handle labels
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if code.endswith(":"):
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continue
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parts = re.split(r"\s+", code)
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parts = code.split()
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instruction = parts[0].lower()
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operands = parts[1:] if len(parts) > 1 else []
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# Strip commas from registers and operands
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operands = [op.replace(",", "") for op in operands]
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# Handle db strings
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if instruction == "db":
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string_literal = " ".join(operands).strip("\"")
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if not string_literal:
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errors.append((line_number, "Empty string literal in 'db'", line))
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error_flag = True
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continue
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# Validate instruction and operands
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# Strip commas from operands
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operands = [op.replace(",", "") for op in operands]
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# Validate instruction and operands (same as before)
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if instruction == "ldw" and len(operands) == 2:
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reg, value = operands
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if reg not in valid_registers:
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errors.append((line_number, f"invalid register '{reg}'", line))
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errors.append((line_number, f"Invalid register '{reg}'", line))
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error_flag = True
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elif instruction == "str" and len(operands) == 2:
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reg, address = operands
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if reg not in valid_registers:
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errors.append((line_number, f"invalid register '{reg}'", line))
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errors.append((line_number, f"Invalid register '{reg}'", line))
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error_flag = True
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try:
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mem_address = int(address, 16)
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if str(address).startswith("0x"):
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mem_address = int(address, 16)
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else:
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mem_address = int(address)
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if mem_address < program_length:
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errors.append((line_number, f"illegal memory write to program space in '{code}'", line))
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errors.append((line_number, f"Illegal memory write to program space in '{code}'", line))
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error_flag = True
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if mem_address > memory_limit:
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errors.append((line_number, f"illegal memory write out of bounds in '{code}'", line))
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errors.append((line_number, f"Illegal memory write out of bounds in '{code}'", line))
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error_flag = True
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except ValueError:
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errors.append((line_number, f"invalid memory address '{address}'", line))
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errors.append((line_number, f"Invalid memory address '{address}'", line))
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error_flag = True
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elif instruction in {"add", "sub", "mov", "xor", "and", "mul", "div"} and len(operands) == 2:
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elif instruction in {"add", "sub", "mov", "xor", "and", "mul", "div", "ldb", "stb"} and len(operands) == 2:
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reg1, reg2 = operands
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if reg1 not in valid_registers or reg2 not in valid_registers:
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errors.append((line_number, f"invalid register(s) in '{code}'", line))
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errors.append((line_number, f"Invalid register(s) in '{code}'", line))
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error_flag = True
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elif instruction in {"push", "pop"} and len(operands) == 1:
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reg = operands[0]
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if reg not in valid_registers:
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errors.append((line_number, f"invalid register '{reg}'", line))
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errors.append((line_number, f"Invalid register '{reg}'", line))
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error_flag = True
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if instruction == "push":
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stack_balance += 1
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if stack_balance > 16: # Example stack limit
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warnings.append((line_number, "stack overflow detected", line))
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warnings.append((line_number, "Stack overflow detected", line))
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elif instruction == "pop":
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stack_balance -= 1
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if stack_balance < 0:
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errors.append((line_number, f"stack underflow detected at '{code}'", line))
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errors.append((line_number, f"Stack underflow detected at '{code}'", line))
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error_flag = True
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# Validate branch instructions with two registers and one label
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elif instruction in {"bne", "beq", "blt"}:
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if len(operands) != 3:
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errors.append((line_number, f"branch instruction '{instruction}' should have 2 registers and 1 label", line))
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errors.append((line_number, f"Branch instruction '{instruction}' should have 2 registers and 1 label", line))
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error_flag = True
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else:
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reg1, reg2, label = operands
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if reg1 not in valid_registers or reg2 not in valid_registers:
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errors.append((line_number, f"invalid register(s) in '{instruction}'", line))
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errors.append((line_number, f"Invalid register(s) in '{instruction}'", line))
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error_flag = True
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label_references.append((line_number, label, line)) # The third operand should be a label
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# Check undefined labels
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for line_number, label, line in label_references:
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if label not in labels:
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errors.append((line_number, f"undefined label '{label}'", line))
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errors.append((line_number, f"Undefined label '{label}'", line))
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error_flag = True
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# Check stack balance at the end
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# Check stack balance
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if stack_balance != 0:
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warnings.append((0, "stack imbalance detected, unbalanced push/pop operations", ""))
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warnings.append((0, "Stack imbalance detected, unbalanced push/pop operations", ""))
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# Print errors and warnings
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for line_number, message, code_line in errors:
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@ -236,25 +318,22 @@ def preprocess(lines, filename="main.asm"):
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else:
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print(colored(f"{filename}:{line_number}: warning: {message}", "yellow"))
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print(colored(f" {line_number} | {code_line}", "white"))
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if program_length >= memory_limit:
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error_flag = True
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print(colored(f"GLOBAL: error: Program too big, size: {program_length}", "red"))
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# Final success message
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if not error_flag:
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print(colored("Preprocessing complete. No errors detected!", "green"))
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print(colored(f"{filename}: Done!", "green"))
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else:
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exit(1)
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return expanded_lines
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preprocess(lines)
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lines = preprocess(lines, filename=filename)
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@ -263,19 +342,39 @@ preprocess(lines)
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lineNumber = 0
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COMPILE_ERROR = False
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def _ValueError(message):
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global COMPILE_ERROR
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COMPILE_ERROR = True
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print("ValueError: %s on line:" % message, lineNumber)
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def _IndexError(message):
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global COMPILE_ERROR
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COMPILE_ERROR = True
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print("IndexError: %s on line:" % message, lineNumber)
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def _InstructionError(message):
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global COMPILE_ERROR
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COMPILE_ERROR = True
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print("InstructionError: %s on line:" % message, lineNumber)
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def load_include(filename):
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with open(filename, "r") as f:
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lines = f.readlines()
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return lines
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# for line in lines:
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# line = line.split(";")[0] # filter out comments
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# print(line)
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@ -287,6 +386,9 @@ current_label = None
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itterrator = 0
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for line in lines:
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# Remove leading and trailing whitespace
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stripped_line = line.strip()
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@ -296,10 +398,54 @@ for line in lines:
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current_label = stripped_line[:-1] # Remove the colon
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current_label = current_label.upper()
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label_to_instructions[current_label] = [] # Initialize empty instruction list
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elif stripped_line.startswith('%'):
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# Get the command within the current line
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command = ""
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for char in stripped_line:
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if char == "%":
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continue
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if char == " ": # Space
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break
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command += char
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#print(command)
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if command == "define": #! defines are handled in the preprocessor
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pass
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elif command == "include":
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# Get value between quotes
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inQuote = False
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include_filepath = ""
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for char in stripped_line:
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if char == '"':
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inQuote = not inQuote
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elif inQuote:
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include_filepath += char
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if include_filepath == '':
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continue
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lines += ["\n"] + load_include(include_filepath)
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elif stripped_line:
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# It's an instruction; add it to the current label's list
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if current_label is not None:
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label_to_instructions[current_label].append(stripped_line)
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itterrator+=1
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@ -307,68 +453,111 @@ for line in lines:
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# register letter to identifyer
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registerDict = {'a':0x0,'b':0x1,'c':0x2,'d':0x3,'e':0x4,'f':0x5}
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current_byte_offset = 0 # Tracks the current byte address
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label_addresses = {} # Maps label names to their resolved byte addresses
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for label in label_to_instructions:
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label_addresses[label] = current_byte_offset
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for line in label_to_instructions[label]:
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line = line.strip().split(";")[0] # strip comments
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line = line.rstrip(" ") # strip spaces at end
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line = line.strip().split(";")[0] # Strip comments
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line = line.rstrip(" ") # Strip spaces at end
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line = line.replace(",", "") # Remove commas
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line = line.split(" ") # Get each part of the instruction
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line = line.replace(",", "") # stupid way to remove commas but it works
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line = line.split(" ") # get each part of the instruction
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line[0] = line[0].lower() # make instruction lowercase
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line[0] = line[0].lower() # Make instruction lowercase
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if line[0] == '':
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continue
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if line[0] in {"ldw","mov","add","sub","str","ldr","int","push","pop","jsr", "ret", 'xor', 'and', 'jmp', 'mul', 'div'}: # 3 byte instructions
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if line[0] in {"ldw", "mov", "add", "sub", "str", "ldr", "int", "push", "pop", "jsr", "ret", 'xor', 'and', 'jmp', 'mul', 'div', 'ldb', 'stb'}: # 3 byte instructions
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current_byte_offset += 3
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elif line[0] in {'bne', 'beq', 'blt'}: # 4 byte instructions
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elif line[0] in {'bne', 'beq', 'blt'}: # 4 byte instructions
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current_byte_offset += 4
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current_byte_offset = 0 # Tracks the current byte address
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#print(label_addresses)
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outputBytes = []
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for label in label_to_instructions:
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#print(label)
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if label_addresses[label] != current_byte_offset:
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if label_addresses[label] != current_byte_offset and not COMPILE_ERROR:
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raise IndexError(f"address mismatch, expected {label_addresses[label]}, got {current_byte_offset}")
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# Output the results
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for line in label_to_instructions[label]:
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line = line.strip().split(";")[0] # strip comments
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line = line.rstrip(" ") # strip spaces at end
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line = line.strip().split(";")[0] # Strip comments
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line = line.rstrip(" ") # Strip trailing spaces
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line = line.replace(",", "") # Remove commas
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line = line.split(" ") # Split into instruction parts
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line = line.replace(",", "") # stupid way to remove commas but it works
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line = line.split(" ") # get each part of the instruction
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line[0] = line[0].lower() # make instruction lowercase
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if line[0] == '':
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if not line[0]:
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continue
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line[0] = line[0].lower() # Normalize instruction to lowercase
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# Regular instruction processing (already present in your code)
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index = 0
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for operator in line:
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if operator in macro_definitions:
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line[index] = macro_definitions[line[index]]
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index += 1
|
||||
|
||||
|
||||
|
||||
#print(line)
|
||||
|
||||
|
||||
#! Code to convert to bytes
|
||||
bytes = []
|
||||
try:
|
||||
if line[0] == 'ldw': # Load immediate to register
|
||||
|
||||
# Handle 'db' directive for defining strings or raw bytes
|
||||
if line[0] == 'db':
|
||||
if len(line) < 3:
|
||||
_InstructionError("Missing data for 'db' directive")
|
||||
raw_data = " ".join(line[1:]).strip("'\"")
|
||||
bytes = [ord(char) for char in raw_data] # Convert characters to ASCII values
|
||||
bytes.append(0) # Null terminator
|
||||
outputBytes += bytes
|
||||
current_byte_offset += len(bytes)
|
||||
continue
|
||||
|
||||
# Add 'ldb' instruction handling
|
||||
elif line[0] == 'ldb': # Load byte to register
|
||||
|
||||
bytes.append(0x15) # Assuming 0x15 for 'ldb'
|
||||
register = registerDict.get(line[1].lower(), -1)
|
||||
if register >= 0 and register <= 5:
|
||||
bytes.append(register)
|
||||
else:
|
||||
_ValueError("Invalid Register")
|
||||
register = registerDict.get(line[2].lower(), -1)
|
||||
if register >= 0 and register <= 5:
|
||||
bytes.append(register)
|
||||
else:
|
||||
_ValueError("Invalid Register")
|
||||
|
||||
|
||||
elif line[0] == 'stb': # Load byte to register
|
||||
|
||||
bytes.append(0x16) # Assuming 0x15 for 'ldb'
|
||||
register = registerDict.get(line[1].lower(), -1)
|
||||
if register >= 0 and register <= 5:
|
||||
bytes.append(register)
|
||||
else:
|
||||
_ValueError("Invalid Register")
|
||||
register = registerDict.get(line[2].lower(), -1)
|
||||
if register >= 0 and register <= 5:
|
||||
bytes.append(register)
|
||||
else:
|
||||
_ValueError("Invalid Register")
|
||||
|
||||
|
||||
elif line[0] == 'ldw': # Load immediate to register
|
||||
bytes.append(0x1) # byte for load immediate value
|
||||
# set register ID:
|
||||
register = registerDict.get(line[1].lower(),-1)
|
||||
@ -571,7 +760,6 @@ for label in label_to_instructions:
|
||||
|
||||
elif line[0] == 'ret': # Load immediate to register
|
||||
bytes.append(0xE)
|
||||
# set register ID:
|
||||
bytes.append(0x0) # padding
|
||||
bytes.append(0x0) # padding
|
||||
|
||||
@ -692,6 +880,7 @@ for label in label_to_instructions:
|
||||
|
||||
|
||||
else:
|
||||
print(line)
|
||||
_InstructionError("Unknown Instruction")
|
||||
|
||||
|
||||
@ -699,6 +888,7 @@ for label in label_to_instructions:
|
||||
except IndexError:
|
||||
_IndexError("Maformed Instruction")
|
||||
except ValueError:
|
||||
print(line)
|
||||
_ValueError("Unknown Error")
|
||||
|
||||
current_byte_offset += len(bytes)
|
||||
@ -707,9 +897,18 @@ for label in label_to_instructions:
|
||||
lineNumber+=1
|
||||
outputBytes += bytes
|
||||
|
||||
|
||||
print(outputBytes)
|
||||
if not COMPILE_ERROR:
|
||||
with open("program.py", "w") as f:
|
||||
bytecode = []
|
||||
for _, y in enumerate(outputBytes):
|
||||
bytecode.append(str(y))
|
||||
|
||||
prg = "program = [" + ",".join(bytecode) + "]"
|
||||
f.write(prg)
|
||||
else:
|
||||
print(f"Compilation Error")
|
||||
print(f"This is most likely due to invalid macro, please check your code for typos ")
|
||||
|
||||
|
||||
|
||||
|
548
c-to-asm.py
Normal file
548
c-to-asm.py
Normal file
@ -0,0 +1,548 @@
|
||||
import re
|
||||
import os
|
||||
from termcolor import colored
|
||||
|
||||
|
||||
class Variable:
|
||||
def __init__(self, name, address, var_type="int"):
|
||||
self.name = name
|
||||
self.address = address
|
||||
self.type = var_type
|
||||
|
||||
class Compiler:
|
||||
def __init__(self):
|
||||
# 1024 bytes total: 0x000 to 0x3FF
|
||||
self.data_ptr = 0x400
|
||||
self.variables = {}
|
||||
self.struct_definitions = {}
|
||||
self.in_struct_def = False
|
||||
self.current_struct_name = None
|
||||
self.current_struct_fields = []
|
||||
self.defines = {} # For #define macros
|
||||
self.typedefs = {} # For typedef
|
||||
self.label_counter = 0
|
||||
self.block_stack = [] # For if/while blocks
|
||||
|
||||
def new_label(self, prefix):
|
||||
lbl = f"{prefix}{self.label_counter}"
|
||||
self.label_counter += 1
|
||||
return lbl
|
||||
|
||||
def preprocess(self, filename):
|
||||
lines = self._read_file_recursive(filename)
|
||||
processed_lines = self._apply_defines(lines)
|
||||
return processed_lines
|
||||
|
||||
def _read_file_recursive(self, filename, included_files=None):
|
||||
if included_files is None:
|
||||
included_files = set()
|
||||
|
||||
if filename in included_files:
|
||||
# Prevent infinite recursion on includes
|
||||
return []
|
||||
|
||||
included_files.add(filename)
|
||||
|
||||
result_lines = []
|
||||
try:
|
||||
with open(filename, "r") as f:
|
||||
for line in f:
|
||||
line_stripped = line.strip()
|
||||
|
||||
# #include "file"
|
||||
inc_match = re.match(r'#include\s+"([^"]+)"', line_stripped)
|
||||
if inc_match:
|
||||
inc_file = inc_match.group(1)
|
||||
included_content = self._read_file_recursive(inc_file, included_files)
|
||||
result_lines.extend(included_content)
|
||||
continue
|
||||
|
||||
# #define KEY VALUE
|
||||
def_match = re.match(r'#define\s+([a-zA-Z_]\w*)\s+(.*)', line_stripped)
|
||||
if def_match:
|
||||
key = def_match.group(1)
|
||||
value = def_match.group(2)
|
||||
self.defines[key] = value
|
||||
continue
|
||||
|
||||
# typedef oldtype newtype;
|
||||
tmatch = re.match(r'typedef\s+([a-zA-Z_]\w*)\s+([a-zA-Z_]\w*)\s*;', line_stripped)
|
||||
if tmatch:
|
||||
oldt = tmatch.group(1)
|
||||
newt = tmatch.group(2)
|
||||
# Resolve oldt if it's also a typedef
|
||||
oldt = self.apply_typedef(oldt)
|
||||
self.typedefs[newt] = oldt
|
||||
continue
|
||||
|
||||
result_lines.append(line)
|
||||
except FileNotFoundError as e:
|
||||
print(colored(f"{filename}:0: error: {e}", "red"))
|
||||
|
||||
|
||||
return result_lines
|
||||
|
||||
def _apply_defines(self, lines):
|
||||
|
||||
token_pattern = re.compile(r'([A-Za-z0-9_]+)')
|
||||
|
||||
processed = []
|
||||
for line in lines:
|
||||
parts = token_pattern.split(line)
|
||||
# parts: tokens and separators
|
||||
for i, part in enumerate(parts):
|
||||
if part in self.defines:
|
||||
print(f"Replaced {part} with {self.defines[part]}")
|
||||
part = self.defines[part]
|
||||
parts[i] = part
|
||||
new_line = "".join(parts)
|
||||
processed.append(new_line)
|
||||
return processed
|
||||
|
||||
def apply_typedef(self, t):
|
||||
if t in self.typedefs:
|
||||
return self.typedefs[t]
|
||||
return t
|
||||
|
||||
def allocate_bytes(self, count):
|
||||
start_addr = self.data_ptr - (count - 1)
|
||||
if start_addr < 0x000:
|
||||
raise Exception("Out of memory!")
|
||||
self.data_ptr = start_addr - 1
|
||||
return start_addr
|
||||
|
||||
def allocate_var(self, name, var_type="int"):
|
||||
var_type = self.apply_typedef(var_type)
|
||||
if name in self.variables:
|
||||
return self.variables[name]
|
||||
|
||||
if var_type.startswith("struct:"):
|
||||
sname = var_type.split(":")[1]
|
||||
fields = self.struct_definitions[sname]
|
||||
length = len(fields) # each 1 byte
|
||||
start_addr = self.allocate_bytes(length)
|
||||
var = Variable(name, start_addr, var_type)
|
||||
self.variables[name] = var
|
||||
return var
|
||||
else:
|
||||
start_addr = self.allocate_bytes(1)
|
||||
var = Variable(name, start_addr, var_type)
|
||||
self.variables[name] = var
|
||||
return var
|
||||
|
||||
def allocate_array(self, name, length, var_type="int"):
|
||||
var_type = self.apply_typedef(var_type)
|
||||
arr_start = self.allocate_bytes(length)
|
||||
var_addr = self.allocate_bytes(1)
|
||||
var = Variable(name, var_addr, "array")
|
||||
self.variables[name] = var
|
||||
return var, arr_start
|
||||
|
||||
def store_string(self, string_value):
|
||||
string_value = string_value.replace('\\n', '\n')
|
||||
length = len(string_value) + 1
|
||||
start_addr = self.allocate_bytes(length)
|
||||
asm = []
|
||||
current_addr = start_addr
|
||||
for ch in string_value:
|
||||
ascii_val = ord(ch)
|
||||
asm.append(f"ldw a, {ascii_val}")
|
||||
asm.append(f"str a, 0x{current_addr:X}")
|
||||
current_addr += 1
|
||||
asm.append("ldw a, 0")
|
||||
asm.append(f"str a, 0x{current_addr:X}")
|
||||
return asm, start_addr
|
||||
|
||||
def get_struct_field_offset(self, struct_type, field_name):
|
||||
sname = struct_type.split(":")[1]
|
||||
fields = self.struct_definitions[sname]
|
||||
for i, (fname, ftype) in enumerate(fields):
|
||||
if fname == field_name:
|
||||
return i
|
||||
raise Exception(f"Field {field_name} not found in {struct_type}")
|
||||
|
||||
def parse_condition(self, cond_str):
|
||||
# cond_str like "a == b" or "a != b"
|
||||
m = re.match(r'([a-zA-Z_]\w*)\s*(==|!=)\s*([a-zA-Z_]\w*)', cond_str.strip())
|
||||
if not m:
|
||||
raise Exception("Unsupported condition: " + cond_str)
|
||||
var1, op, var2 = m.groups()
|
||||
return var1, op, var2
|
||||
|
||||
def compile_condition(self, var1, op, var2):
|
||||
asm = []
|
||||
v1 = self.allocate_var(var1)
|
||||
v2 = self.allocate_var(var2)
|
||||
asm.append(f"ldr a, 0x{v1.address:X}")
|
||||
asm.append(f"ldr b, 0x{v2.address:X}")
|
||||
# a = a - b
|
||||
asm.append("sub a, b")
|
||||
return asm, op
|
||||
|
||||
def extract_comment(self, line):
|
||||
comment_index = line.find('//')
|
||||
if comment_index != -1:
|
||||
code_part = line[:comment_index]
|
||||
comment_part = line[comment_index+2:].strip()
|
||||
return code_part, comment_part
|
||||
return line, None
|
||||
|
||||
def compile_line(self, code_part):
|
||||
line = code_part.strip()
|
||||
asm = []
|
||||
|
||||
if self.in_struct_def:
|
||||
if line.startswith("};"):
|
||||
self.struct_definitions[self.current_struct_name] = self.current_struct_fields
|
||||
self.in_struct_def = False
|
||||
self.current_struct_name = None
|
||||
self.current_struct_fields = []
|
||||
return asm
|
||||
mfield = re.match(r'int\s+([a-zA-Z_]\w*)\s*;', line)
|
||||
if mfield:
|
||||
fname = mfield.group(1)
|
||||
ftype = "int"
|
||||
self.current_struct_fields.append((fname, ftype))
|
||||
return asm
|
||||
|
||||
# struct definition start
|
||||
msd = re.match(r'struct\s+([a-zA-Z_]\w*)\s*\{', line)
|
||||
if msd:
|
||||
self.in_struct_def = True
|
||||
self.current_struct_name = msd.group(1)
|
||||
self.current_struct_fields = []
|
||||
return asm
|
||||
|
||||
# struct var declaration
|
||||
msv = re.match(r'struct\s+([a-zA-Z_]\w*)\s+([a-zA-Z_]\w*)\s*;', line)
|
||||
if msv:
|
||||
sname, varname = msv.groups()
|
||||
var_type = "struct:" + sname
|
||||
self.allocate_var(varname, var_type)
|
||||
return asm
|
||||
|
||||
# if statement
|
||||
mif = re.match(r'if\s*\(([^)]+)\)\s*\{', line)
|
||||
if mif:
|
||||
cond_str = mif.group(1)
|
||||
var1, op, var2 = self.parse_condition(cond_str)
|
||||
end_label = self.new_label("endif")
|
||||
cond_code, cmp_op = self.compile_condition(var1, op, var2)
|
||||
asm.extend(cond_code)
|
||||
# if '==': jump if not zero a != 0
|
||||
# if '!=': jump if zero a == 0
|
||||
if cmp_op == '==':
|
||||
asm.append("bne a, 0, " + end_label)
|
||||
else:
|
||||
asm.append("beq a, 0, " + end_label)
|
||||
self.block_stack.append(('if', end_label))
|
||||
return asm
|
||||
|
||||
# while statement
|
||||
mwhile = re.match(r'while\s*\(([^)]+)\)\s*\{', line)
|
||||
if mwhile:
|
||||
cond_str = mwhile.group(1)
|
||||
var1, op, var2 = self.parse_condition(cond_str)
|
||||
start_label = self.new_label("whilestart")
|
||||
end_label = self.new_label("whileend")
|
||||
asm.append(start_label + ":")
|
||||
cond_code, cmp_op = self.compile_condition(var1, op, var2)
|
||||
asm.extend(cond_code)
|
||||
if cmp_op == '==':
|
||||
asm.append("bne a, 0, " + end_label)
|
||||
else:
|
||||
asm.append("beq a, 0, " + end_label)
|
||||
self.block_stack.append(('while', start_label, end_label))
|
||||
return asm
|
||||
|
||||
# end of block
|
||||
if line == "}":
|
||||
if not self.block_stack:
|
||||
return asm
|
||||
blk = self.block_stack.pop()
|
||||
if blk[0] == 'if':
|
||||
end_label = blk[1]
|
||||
asm.append(end_label + ":")
|
||||
elif blk[0] == 'while':
|
||||
start_label = blk[1]
|
||||
end_label = blk[2]
|
||||
# jump back to start
|
||||
asm.append(f"jmp {start_label}")
|
||||
asm.append(end_label + ":")
|
||||
return asm
|
||||
|
||||
# p.x = number;
|
||||
m = re.match(r'([a-zA-Z_]\w*)\.([a-zA-Z_]\w*)\s*=\s*(\d+)\s*;', line)
|
||||
if m:
|
||||
varname, fieldname, value = m.groups()
|
||||
value = int(value)
|
||||
v = self.allocate_var(varname)
|
||||
offset = self.get_struct_field_offset(v.type, fieldname)
|
||||
asm.append(f"ldr a, 0x{v.address:X}")
|
||||
if offset != 0:
|
||||
asm.append(f"ldw b, {offset}")
|
||||
asm.append("add a, b")
|
||||
asm.append(f"ldw c, {value}")
|
||||
asm.append("stb c, a")
|
||||
return asm
|
||||
|
||||
# p.x = var + number;
|
||||
m = re.match(r'([a-zA-Z_]\w*)\.([a-zA-Z_]\w*)\s*=\s*([a-zA-Z_]\w*)\s*\+\s*(\d+)\s*;', line)
|
||||
if m:
|
||||
varname, fieldname, srcvar, number = m.groups()
|
||||
number = int(number)
|
||||
v = self.allocate_var(varname)
|
||||
offset = self.get_struct_field_offset(v.type, fieldname)
|
||||
asm.append(f"ldr a, 0x{v.address:X}")
|
||||
if offset != 0:
|
||||
asm.append(f"ldw b, {offset}")
|
||||
asm.append("add a, b")
|
||||
v2 = self.allocate_var(srcvar)
|
||||
asm.append(f"ldr c, 0x{v2.address:X}")
|
||||
asm.append(f"ldw d, {number}")
|
||||
asm.append("add c, d")
|
||||
asm.append("stb c, a")
|
||||
return asm
|
||||
|
||||
# p.x = srcvar;
|
||||
m = re.match(r'([a-zA-Z_]\w*)\.([a-zA-Z_]\w*)\s*=\s*([a-zA-Z_]\w*)\s*;', line)
|
||||
if m:
|
||||
varname, fieldname, srcvar = m.groups()
|
||||
v = self.allocate_var(varname)
|
||||
offset = self.get_struct_field_offset(v.type, fieldname)
|
||||
asm.append(f"ldr a, 0x{v.address:X}")
|
||||
if offset != 0:
|
||||
asm.append(f"ldw b, {offset}")
|
||||
asm.append("add a, b")
|
||||
v2 = self.allocate_var(srcvar)
|
||||
asm.append(f"ldr c, 0x{v2.address:X}")
|
||||
asm.append("stb c, a")
|
||||
return asm
|
||||
|
||||
# x = p.x;
|
||||
m = re.match(r'([a-zA-Z_]\w*)\s*=\s*([a-zA-Z_]\w*)\.([a-zA-Z_]\w*)\s*;', line)
|
||||
if m:
|
||||
dst, varname, fieldname = m.groups()
|
||||
v = self.allocate_var(varname)
|
||||
offset = self.get_struct_field_offset(v.type, fieldname)
|
||||
vd = self.allocate_var(dst)
|
||||
asm.append(f"ldr a, 0x{v.address:X}")
|
||||
if offset != 0:
|
||||
asm.append(f"ldw b, {offset}")
|
||||
asm.append("add a, b")
|
||||
asm.append("ldb c, a")
|
||||
asm.append(f"str c, 0x{vd.address:X}")
|
||||
return asm
|
||||
|
||||
# print_int(p.x);
|
||||
m = re.match(r'print_int\(([a-zA-Z_]\w*)\.([a-zA-Z_]\w*)\)\s*;', line)
|
||||
if m:
|
||||
varname, fieldname = m.groups()
|
||||
v = self.allocate_var(varname)
|
||||
offset = self.get_struct_field_offset(v.type, fieldname)
|
||||
asm.append(f"ldr a, 0x{v.address:X}")
|
||||
if offset != 0:
|
||||
asm.append(f"ldw b, {offset}")
|
||||
asm.append("add a, b")
|
||||
asm.append("ldb a, a")
|
||||
asm.append("int 0x01")
|
||||
return asm
|
||||
|
||||
# int arr[10];
|
||||
m = re.match(r'int\s+([a-zA-Z_]\w*)\[(\d+)\]\s*;', line)
|
||||
if m:
|
||||
varname = m.group(1)
|
||||
length = int(m.group(2))
|
||||
arr_var, start_addr = self.allocate_array(varname, length)
|
||||
asm.append(f"ldw a, 0x{start_addr:X}")
|
||||
asm.append(f"str a, 0x{arr_var.address:X}")
|
||||
return asm
|
||||
|
||||
# int x = number;
|
||||
m = re.match(r'int\s+([a-zA-Z_]\w*)\s*=\s*(\d+)\s*;', line)
|
||||
if m:
|
||||
varname = m.group(1)
|
||||
value = int(m.group(2))
|
||||
var = self.allocate_var(varname, "int")
|
||||
asm.append(f"ldw a, {value}")
|
||||
asm.append(f"str a, 0x{var.address:X}")
|
||||
return asm
|
||||
|
||||
# int y = x + number;
|
||||
m = re.match(r'int\s+([a-zA-Z_]\w*)\s*=\s*([a-zA-Z_]\w*)\s*\+\s*(\d+)\s*;', line)
|
||||
if m:
|
||||
varname, var2, number = m.groups()
|
||||
number = int(number)
|
||||
v1 = self.allocate_var(varname, "int")
|
||||
v2 = self.allocate_var(var2, "int")
|
||||
asm.append(f"ldr a, 0x{v2.address:X}")
|
||||
asm.append(f"ldw b, {number}")
|
||||
asm.append("add a, b")
|
||||
asm.append(f"str a, 0x{v1.address:X}")
|
||||
return asm
|
||||
|
||||
# char *msg = "Hello\n";
|
||||
m = re.match(r'char\s*\*\s*([a-zA-Z_]\w*)\s*=\s*"([^"]*)"\s*;', line)
|
||||
if m:
|
||||
varname, string_val = m.groups()
|
||||
v = self.allocate_var(varname, "char*")
|
||||
code, start_addr = self.store_string(string_val)
|
||||
asm.extend(code)
|
||||
asm.append(f"ldw a, 0x{start_addr:X}")
|
||||
asm.append(f"str a, 0x{v.address:X}")
|
||||
return asm
|
||||
|
||||
# var = number;
|
||||
m = re.match(r'([a-zA-Z_]\w*)\s*=\s*(\d+)\s*;', line)
|
||||
if m:
|
||||
varname, value = m.groups()
|
||||
value = int(value)
|
||||
v = self.allocate_var(varname, "int")
|
||||
asm.append(f"ldw a, {value}")
|
||||
asm.append(f"str a, 0x{v.address:X}")
|
||||
return asm
|
||||
|
||||
# var = var2 + number;
|
||||
m = re.match(r'([a-zA-Z_]\w*)\s*=\s*([a-zA-Z_]\w*)\s*\+\s*(\d+)\s*;', line)
|
||||
if m:
|
||||
varname, var2, number = m.groups()
|
||||
number = int(number)
|
||||
v1 = self.allocate_var(varname, "int")
|
||||
v2 = self.allocate_var(var2, "int")
|
||||
asm.append(f"ldr a, 0x{v2.address:X}")
|
||||
asm.append(f"ldw b, {number}")
|
||||
asm.append("add a, b")
|
||||
asm.append(f"str a, 0x{v1.address:X}")
|
||||
return asm
|
||||
|
||||
# var[index] = number;
|
||||
m = re.match(r'([a-zA-Z_]\w*)\[(\d+)\]\s*=\s*(\d+)\s*;', line)
|
||||
if m:
|
||||
arr, index, value = m.groups()
|
||||
index = int(index)
|
||||
value = int(value)
|
||||
arr_var = self.allocate_var(arr)
|
||||
asm.append(f"ldr a, 0x{arr_var.address:X}")
|
||||
asm.append(f"ldw b, {index}")
|
||||
asm.append("add a, b")
|
||||
asm.append(f"ldw c, {value}")
|
||||
asm.append("stb c, a")
|
||||
return asm
|
||||
|
||||
# x = arr[index];
|
||||
m = re.match(r'([a-zA-Z_]\w*)\s*=\s*([a-zA-Z_]\w*)\[(\d+)\]\s*;', line)
|
||||
if m:
|
||||
varname, arr, index = m.groups()
|
||||
index = int(index)
|
||||
v = self.allocate_var(varname, "int")
|
||||
arr_var = self.allocate_var(arr)
|
||||
asm.append(f"ldr a, 0x{arr_var.address:X}")
|
||||
asm.append(f"ldw b, {index}")
|
||||
asm.append("add a, b")
|
||||
asm.append("ldb d, a")
|
||||
asm.append(f"str d, 0x{v.address:X}")
|
||||
return asm
|
||||
|
||||
# print_char(var);
|
||||
m = re.match(r'print_char\(([a-zA-Z_]\w*)\)\s*;', line)
|
||||
if m:
|
||||
varname = m.group(1)
|
||||
v = self.allocate_var(varname)
|
||||
asm.append(f"ldr a, 0x{v.address:X}")
|
||||
asm.append("int 0x00")
|
||||
return asm
|
||||
|
||||
# print_char(arr[index]);
|
||||
m = re.match(r'print_char\(([a-zA-Z_]\w*)\[(\d+)\]\)\s*;', line)
|
||||
if m:
|
||||
arr, index = m.groups()
|
||||
index = int(index)
|
||||
arr_var = self.allocate_var(arr)
|
||||
asm.append(f"ldr a, 0x{arr_var.address:X}")
|
||||
asm.append(f"ldw b, {index}")
|
||||
asm.append("add a, b")
|
||||
asm.append("ldb a, a")
|
||||
asm.append("int 0x00")
|
||||
return asm
|
||||
|
||||
# print_int(var);
|
||||
m = re.match(r'print_int\(([a-zA-Z_]\w*)\)\s*;', line)
|
||||
if m:
|
||||
varname = m.group(1)
|
||||
v = self.allocate_var(varname)
|
||||
asm.append(f"ldr a, 0x{v.address:X}")
|
||||
asm.append("int 0x01")
|
||||
return asm
|
||||
|
||||
# print_string(var);
|
||||
m = re.match(r'print_string\(([a-zA-Z_]\w*)\)\s*;', line)
|
||||
if m:
|
||||
varname = m.group(1)
|
||||
v = self.allocate_var(varname, "char*")
|
||||
asm.append("ldw d, 0")
|
||||
asm.append(f"ldr b, 0x{v.address:X}")
|
||||
asm.append("ldw c, 1")
|
||||
asm.append("string_loop:")
|
||||
asm.append("ldb a, b")
|
||||
asm.append("beq a, d, string_end")
|
||||
asm.append("int 0x00")
|
||||
asm.append("add b, c")
|
||||
asm.append("jmp string_loop")
|
||||
asm.append("string_end:")
|
||||
return asm
|
||||
|
||||
# return number;
|
||||
m = re.match(r'return\s+(\d+)\s*;', line)
|
||||
if m:
|
||||
asm.append("int 0xFF")
|
||||
return asm
|
||||
|
||||
# Unrecognized line or empty
|
||||
return asm
|
||||
|
||||
def compile_c(self, c_code):
|
||||
# First, parse everything to detect structs and typedef done in preprocess
|
||||
all_lines = c_code.split('\n')
|
||||
# struct definitions might appear outside main
|
||||
for cline in all_lines:
|
||||
self.compile_line(cline)
|
||||
|
||||
# Extract lines inside main
|
||||
lines = []
|
||||
in_main = False
|
||||
for cline in all_lines:
|
||||
cline = cline.rstrip()
|
||||
if 'int main(' in cline:
|
||||
in_main = True
|
||||
continue
|
||||
if in_main:
|
||||
if cline.startswith('}'):
|
||||
in_main = False
|
||||
break
|
||||
lines.append(cline)
|
||||
|
||||
asm = ["main:"]
|
||||
for line in lines:
|
||||
code_part, comment_part = self.extract_comment(line)
|
||||
instructions = self.compile_line(code_part)
|
||||
if instructions:
|
||||
for i, instr in enumerate(instructions):
|
||||
if i == 0 and comment_part:
|
||||
asm.append(f" {instr} ; {comment_part}")
|
||||
else:
|
||||
asm.append(f" {instr}")
|
||||
else:
|
||||
if comment_part:
|
||||
asm.append(f" ; {comment_part}")
|
||||
|
||||
return asm
|
||||
|
||||
if __name__ == "__main__":
|
||||
compiler = Compiler()
|
||||
preprocessed_lines = compiler.preprocess("main.c")
|
||||
c_code = "\n".join(preprocessed_lines)
|
||||
asm_code = compiler.compile_c(c_code)
|
||||
|
||||
with open("test.asm", "w") as out:
|
||||
for line in asm_code:
|
||||
out.write(line + "\n")
|
BIN
drive8.bin
BIN
drive8.bin
Binary file not shown.
27
main.asm
27
main.asm
@ -1,9 +1,12 @@
|
||||
; Initialize text mode
|
||||
|
||||
|
||||
main:
|
||||
ldw a, 1 ; Mode: 1 for text mode
|
||||
ldw a, 0 ; Mode: 1 for text mode
|
||||
ldw b, 800 ; Horizontal resolution
|
||||
ldw c, 600 ; Vertical resolution
|
||||
int 0x70 ; Initialize display
|
||||
jsr test
|
||||
ldw b, 0 ; Cursor position (character cell index)
|
||||
ldw c, 0xFFFFFF ; White color
|
||||
|
||||
@ -25,22 +28,8 @@ main_loop:
|
||||
|
||||
; Render the character
|
||||
int 0x72 ; Render the character (using the keycode from register 0x0 at position b)
|
||||
|
||||
; Write letter to disk at index ;push a
|
||||
; Write letter to disk at index ;push b
|
||||
; Write letter to disk at index ;push c
|
||||
; Write letter to disk at index ;push d
|
||||
; Write letter to disk at index ;
|
||||
; Write letter to disk at index ;ldw a, 8 ; disk number
|
||||
; Write letter to disk at index ;ldw b, 0 ; sector number
|
||||
; Write letter to disk at index ;ldr c, 0xEE ; byte offset
|
||||
; Write letter to disk at index ;ldr d, 0xEF ; value to write
|
||||
; Write letter to disk at index ;
|
||||
; Write letter to disk at index ;int 0x81 ; Write
|
||||
; Write letter to disk at index ;
|
||||
; Write letter to disk at index ;pop d
|
||||
; Write letter to disk at index ;pop c
|
||||
; Write letter to disk at index ;pop b
|
||||
; Write letter to disk at index ;pop a
|
||||
; Reset cursor to the top of the screen
|
||||
jmp main_loop ; Jump back to the main loop
|
||||
|
||||
|
||||
|
||||
%include "std.asm"
|
Loading…
Reference in New Issue
Block a user